1. Why and How?

A question was posed in an Eagle newsgroup, asking if it would be possible to view EAGLE layouts in a 3D representation. This had not been possible so far. As I had vacations at this time, I decided to set to work. Of course the first problem was how to convert a 2D picture into three dimensions. Then POVRay came into my mind.

POVRay Open Source project had been around for more than 10 years. It is a raytracer which can be controlled by a kind of script language (SDL, Scene Description Language). It was perfect for the EAGLE 3D project. EAGLE can generate text files with the help of a User Language Program (ULP). This text file needs to contain the SDL commands to make the layouts glow in realistic 3-dimensional brilliance.

Additionally EAGLE does not know anything about measurements in the 3rd dimension. So it was necessary to generate a library which contains all sorts of models to be used with POVRay.

This documentation was translated by Richard Hammerl. I think he did it very well. But I have translated some parts myself, so there may be some errors in English grammar.

Matthias Weißer

2. What is Supplied And What We Need

Filename What is this
Eagle Files (Subdirectory /ulp)
3d40.ulp ULP for Eagle ⇐4.09r2
3d41.ulp ULP for Eagle >=4.1
3dfunc.ulp Some functions for 3d.ulp
3dpack.dat Package reference file
3dconf.dat Configuration file (empty)
3dlang(_x).dat Language file German (other language)
3dcol(_x).dat Color mapping file German (other language)
3d_cam.png Image for dialog
3d_ko.png Image for dialog
POV-Ray files (Subdirectory /povray)
cap.inc Macros capacitors
capwima.inc Macros WIMA capacitors
connector.inc Macros connectors
diode.inc Macros diodes
ic.inc Macros integrated circuits
qfp.inc Macros xQFP packages
resistor.inc Macros resistors
socket.inc Macros sockets for ICs
special.inc Macros which do not fit anywhere else
switch.inc Macros switches
transistor.inc Macros transistors
tools.inc Miscellaneous macros, declares etc.
user.inc User settings (empty)
tex_elko.png Texture for electrolytic capacitors
tex_elko_axial.png Texture for axial electrolytic capacitors
Sample files (Subdirectory /examples)
MoDsMega.brd Board file for making the example
MoDsMega.pov POV-Ray file, all options active (v1.01)
MoDsMega.png Generated out of MoDsMega.pov
MoDsMega.ini INI file for POV-Ray

There are some additional BRD files which show most of the parts models available for 3D representation. The additional image pack contains images of all available parts in Eagle3D.

Software Requirements:

  • Eagle 4.08

You have to run 3d40.ulp for that version.
If you are still working with an Eagle 3.55 license you could use the current Freeware to generate POVRay files.
www.cadsoft.de
www.cadsoftusa.com

  • Eagle 4.16

This version of Eagle is now the current release. You have to run 3d41.ulp for this version.

  • POVRay 3.6

You need this software to generate the image from the .pov-File.
www.povray.org

3. Terms of Use

Free usage for personal and educational purposes. Companies which want to use it commercially, should contribute something to the parts libraries. Simply define a part of your choice in SDL and send it to me. I often work with digital electronics, so I am of course interested in real IC’s. Microprocessors, memories, displays, CPLDs and FPGAs are also welcome. Sometimes I am in need of a printed circuit board. Simply contact me. 3D models defined by any user are of course appreciated, so that I can add them to the library.

Distribution and usage of 3D libraries and the ULP in personal projects is allowed only by courtesy of the author. Copyright of provided models remains with the respective author.

4. Features

  • Selection and placement of known parts
  • Tracks
  • Holes
  • Vias
  • Polygons
  • Silk screen
  • Lettering of parts
  • Color selection for LEDs
  • Manual package assignment
  • Boards with square outlines
  • Boards with round outlines
  • Board cutouts in any shape
  • Sockets for DIP and PLCC
  • Multilayer boards (inner layers are visible)
  • File backup of manual assignments
  • Auxilliary allocation file
  • Language selection
  • Combination of several boards

4.1 PCB

The board will be generated either as a “prism” (default) or as a “box”. The board outlines drawn in layer 20 should be closed polygons. Otherwise, very strange board outlines might be generated. In case of display problems you should select the square option in the startup dialog. Round outlines were supported in version 0.97 for the first time. You may use boards whose outlines are entirely drawn with wires or consist of a circle. The usage of arcs is only supported for Eagle 4.1.

4.2 Resistor Rings and Labeling

Discrete resistors with a user specified value will be automatically drawn with correct resistance band colors. Only 4 bands will be generated, however, with a fixed tolerance (5%, gold band). Also SMD resistors will be labeled with the correct combination of three numbers. The part value must have a certain format.

Permissible formats include:

  • 1000 corresponds to 1 kOhm
  • 1k corresponds to 1 kOhm
  • 4,7k corresponds to 4700 Ohm
  • 3M corresponds to 3 Mohm
  • 1R2 corresponds to 1,2 Ohm

These figures may have a varying number of digits, such as ‘12k’ or ‘470’. If this format does not match exactly, one can’t foresee the result of the routine calculating the corresponding colors/numbers. Other information, which will not be evaluated, could be added after the resistor’s value. This information should not be separated by the unique resistance code characters { ‘R’; ‘k’; ‘M’; ‘,’ and ‘.’}.

4.3 Multilayer Boards

The inner structure of a multilayer board will be visible, if the board itself is disabled and the thickness of board and copper is increased significantly. A thickness of about 30 mm for the board and 1 mm for copper is recommended for a 4 layer setup. If the PCB is used, all the inner copper layers are not displayed because you can’t see them. So they don’t have to be rendered and you will get a little bit more rendering speed.

4.4 Polygons

To display a polygon correctly you have to calculate it with RATSNEST before starting the ULP. Polygons will be constructed using lots of small boxes in POVRay. The width and number of them directly corresponds to the ‘width’ used for the polygon in EAGLE. Very small values can lead to enormous POVRay files (>100MB!). To process such a file POVRay needs lots of memory and lots (and I really mean lots) of time. Avoid using too fine a line width. As a rule: Not thinner than 0.1 mm. However, even a coarser width can result in enormous rendering times. As a rule of thumb one can assume that about 500 to 1000 objects will require 1 MB of working memory.

4.5 Unknown Parts

It can be quite useful to manually assign parts. Often there is a model in the library but no corresponding assignment. So you can assign a selectable model to an EAGLE device. This will be saved in a file named boardname.mpd, which can then be used in future runs.

If you want to change an assignment you may need to edit the file “3dusrpac.dat” to delete those assignments you want to undo or delete the file itself. This file may be allocated in the instalation directory o in other place (probably in Eagle instalation directory, under “program files”).

4.6 Holes

Drill holes (for vias, pads, and holes) will be shown as black cylinders by default. For a general overview there is nearly no difference from real holes. This option defines a starting drill diameter size, from which all holes will be drawn as real drills. The default and a very usable value is 2 mm. In case of a via, it can happen that tracks run into the drill hole. In most situations this can be suppressed, but under some conditions it can nevertheless happen. If a polygon is drawn over a via it will likewise be covered.

4.7 Modules

Each individual POVRay rendering file can also be used as an input module, for example, to build a complete system which can consist of several separate modules. For example, a complete PC motherboard with vertical device adapter modules. To use this feature, you have to switch the file which is be used as a module into the module mode. This happens by setting

#local use_file_as_inc = off;

to on. Now the file can be used as an .inc file. In the target file

#include “filename”

will be added directly before other .inc file entries. Running this macro, which has been defined in the module file and which contains the whole board with its macros, now adds the new module to it. The macro has the following parameters:

  • mac_x_ver

Offset on the x axis

  • mac_y_ver

Offset on the y axis

  • mac_z_ver

Offset on the z axis

  • mac_x_rot

Rotation around the x axis

  • mac_y_rot

Rotation around the y axis

  • mac_z_rot

Rotation around the z axis

The macro should be called at the end of the target file, or at least after all #declare, #include, and #local statements. The macro name can be seen at the end of the module file or can be determined from the name of the BRD file. The BRD filename, however will be slightly changed. All letters will be uppercase

  • Umlauts become U, A, O
  • ‘-’, ' ' and ‘.’ will be ‘_’
  • A number in the beginning of the filename will be replaced by ‘Z’.

4.8 Exclude Lists

You can use Exclude lists with Eagle3D to have alternate types of parts on the same PCB and have to do only one run of the ULP. An entry specifying such a list is for example:

#declare pack_R32=off;

Here, the part is placed after the “_” the device name as it is in Eagle. If this name contains special characters (”.”,”-”,” “,”$”) they are replaced by an “_”. A number at the beginning of the name is replaced with a “Z”. These changes are required because POVRay does not accept special characters within identifiers. A file containing a number of these entries can be included in POVRay with:

#include “exclude.ex”

4.9 Silkscreen

The layers which are used for the silkscreen can be entered within the starting dialog. If the layer-number is even the object will be placed on the bottom of the PCB. If the layer-number is odd the object will be placed on the top of the PCB.

4.10 Prefixes

Some packages can be used for more than one type of part. A typical example are the SMD-packages such as 0805 and 1206. Because of this, the packages {1210, 1206, 0805, 0603 and 0402} become prefixed with the first character of the name of that part and then the assignment is done. So a part called R12 and with the package 0805 will rendered as a resistor type R0805. On the other hand a part called C43 and with the package 0805 will be rendered as a type C0805 capacitor.

4.11 Animations

You can produce animations. To create an animation POVRay requires a camera path. This path is represented by a mathematical function (a so-called spline). This spline needs a minimum of three control points. These points are defined by text elements in a special layer (normal 230). The texts in this layer have to have a special format. This format consists of two numbers.

The first number is the sequence information. This means that in this sequence the points are used to create the spline. You have to use an integer.

The second number represents the height of the point over the surface of the PCB. This number could be a real number.

Such a text element could look like: 3 4.2 This means that this is the third point in the animation path and it is 4.2mm over the surface of the PCB. The viewpoint of the camera is normally located right before the camera in flight direction. It is also possible to add an additional viewpoint path. To do this simply add additional control points with a V as first character: e.g. V1 3.4. See the supplied modsmega.brd as an example on how to define these two paths.

POVRay needs an INI-File to create an animation. Such a file is written by Eagle3D when you supply a minimum of three animation points. The file will have the same name as the POVRay-file but with the extension ini instead of pov. If you pass this INI-file to POVRay a sequence of images will be generated. You can then convert this sequence into a video file with programs like VirtualDub. In addition you have to set the parameter

#declare global_anim = off;

in the POVRay file to on. The Parameter

#local global_anim_showcampath = no;

shows you the animation path. You should set this to off if you want to create the animation. On the tab Miscellaneous you can change the layer of the control points and the number of frames you would like to generate. In the supplied modsmega.brd are some control points.

4.12 Automatic package generation

You can create packages without any knowledge of the POVRay language with information added to your libraries. The quality of these created packages doesn’t reach that of the handmade ones but it is OK for a quick overview. To do this draw the outline of the package in an unused layer with wire. Then add a text element to this layer. This text element describes the height and the color of your generated case. You can also use multiple layers to add more detail to your case. You can see how to do this in the supplied eagle3D.lbr. Some examples of the text element and what it does:

  • 3.0 Red

A part which is 3 mm in height and has a pure red surface.

  • 4.3 texture{col_silver}

A part which is 4.3 mm in height and uses the Eagle3D texture col_silver.

  • 2.5 texture{pigment{Gray30} finish{Phong 1}}

A part which is 2.5 mm in height and uses a self defined POVRay texture.

5. Start Dialog Options

5.1 Global tab

  • Parts

Output parts

  • Wires

Output wires

  • Pads & SMDs

Output pads and smds

  • Unknown Parts

Unknown parts will be displayed as a red cylinder.

  • Assign models by yourself

If an unknown part is found, a dialog will be shown to select a package from the library (see 4.5).

  • Cut pins

If active, pins of discrete parts will be shortened to a few mm length.

  • Silk screen

Output silk screen

  • Use assignment from brdname.mpd

If you make a run with parts output (automatic and manual) then the assignment will be written into the POVRay-File and also into a <boardname>.mpd-File. You can use this assignment by selecting this option.

  • Polygons

Output polyogns (see 4.4).

  • Holes (real)

Holes will be shown as real through-hole elements. In case of a via, however, wires can cover it (see 4.6).

  • Holes (fast)

Holes will be shown as black dots on the board. Looks nearly like real ones (see 4.6).

  • Debug

Outputs three cylinder reference triad along the coordinate axes.

  • Board

Outputs the board (see 4.1).

  • Rectangular Board.

The board will be drawn as a simple rectangle.

  • Surrounding

The area around the board will be rendered with waves and clouds.

  • Openings

Generates cutouts in layer 20 in the board.

  • Destination file

Set the destination filename. This name is saved in the configuration file.

  • Set board path

The output path points to the directory where the BRD file is.

  • Sprache/Language

Language settings for screen dialogs

  • create POV-File and Exit

Write the POVRay file and end the ULP.

  • create POV-File

Write the POVRay file, but don’t end the ULP. Thus the existing dialog settings will be maintained for reruns in the current Eagle session.

5.2 Board tab

  • PCB Board thickness (mm)

Thickness of the board material.

  • PCB Copper thickness (mm)

The thickness of copper on the board.

  • Real holes from (mm)

From this limit onward, holes will be shown as real. Smaller ones will become ‘pseudo-holes’.

  • Solder Mask over VIA’s up to (mm)

From this diameter onward vias will be covered with solder stop laquer.

  • Rotation Angle Board (X,Y,Z)

Rotates the board around the respective axis by the given value.

5.3 Camera tab

  • Camera position

Here is the camera

  • Camera looks at

Camera looks at this point

  • Angle of spread

The ‘camera viewing cone angle’

5.4 Spot tab

  • Activate

Switch on the spot

  • Spot color

Set the color

  • Spot Position

Well, the spot’s position

  • Spot Destination Point

The spot’s target, if activated

  • Spotlight

It’s not a ‘wide’ beam, but a directed spot light which has a certain target (see above).

  • Radius

The opening angle of the full intensity light cone.

  • Falloff

This angle has to be wider than the radius. If this is true, the intensity decreases from full cone to this angle continuously (gradually?).

  • No Shadows

The light source does not cast shadows, but illuminates the environment.

5.5 Silk Screen tab

  • Wire’s from Package

The layers named in the textbox (Wire’s from Packages) are printed out as silk screen. (see 4.9)

  • Wire’s from Board

The layers named in the textbox (Wire’s from Board) are printed out as silk screen. (see 4.9)

  • Text’s from Package

The layers named in the textbox (Text’s from Packages) are printed out as silk screen. (see 4.9)

  • Text’s from Board

The layers named in the textbox (Text’s from Board) are printed out as silk screen. (see 4.9)

5.6 Colors tab

  • Color preset

Here you can define some color presets. They can be changed later in the POVRay file itself.

  • Selection

If you have selected “User defined” in the Color preset box you can select the colors here.

  • New Color

Save a new color with its name and RGB settings in 3dcol.inc. From now on it will be available in the Color selection dialog.

6. File Formats

.dat

To integrate a new model you have to define the macro first. The format should look like it is in the standard libraries. That is, for parts which exist in various sizes (ICs, capacitors...) you have to be define a basic macro where the referring parameters set the properties. There are already two powerful macros for SMD-ICs (QFP_GRND and IC_SMD_GRND). After generating a part you have to make it available in the allocation file. A line in 3dpack.dat contains fields which are separated by a colon.

Field index Field meaning Boolean
[00] EaglePackageName
[01] Output name X
[02] Output value X
[03] Define color bands X
[04] SMD offset (parts will be moved pcb_cuhight up/down) X
[05] LED options (The LED options dialog will be displayed) X
[06] Ready for sockets (see explanation) X
[07] Ask for height of crystals X
[08] Has part a macro (for example, SMD jumpers) X
[09] SMD resistor, Generate number combination X
[10] Socket macro
[11] Height of socket in 1/10mm
[12] Comments concerning socket
[13] Internal for administration purpose (not used at present)
[14] Correction angle (y axis) (package to macro)
[15] Offset for correction x
[16] Offset for correction y
[17] Offset for correction z
[18] Use Prefix from Part?
[19] Shunt on pinheader (a dialog will be displayed) X
[20] Logo selection dialog will be shown X
[21] Reserved[8]
[29] Bounding-Box Minimum
[30] Bounding-Box Maximum
[31] POV-Ray macro (macro name and a left parenthesis)
[32] Package comments (German)
[33] Package comments (English)

Only 1 or 0 are allowed here. If option [06] is active, a socket will be generated in addition to the package. Information about the socket can be taken from the fields [10], [11], and [12].The options for each package must exactly match the POVRay macro definition. Otherwise a faulty file will be generated. Anybody who wants to change anything in 3dpack.dat, should have a clear understanding of the text above. I have enough time to integrate new packages, but not enough to explain to everybody the details concerning rules of field assignment.

6.2 3dusrpac.dat

This file has the same format as 3dpack.dat and is used as an auxilliary allocation file. This file does not exist by default, but can be created for assigning user created libraries.

6.3 3dlang.dat and 3dlang_e.dat

These files contain all of the text strings used in screen dialogs in German and in English respectively. If someone is interested, he could translate each line in the file into yet another language and send it to me. I will then bind it into the ULP.

6.4 user.inc

This file contains settings which can be made in the POV-Ray file, like camera and so on (the lines with #declare in the beginning). Therefore simply copy the lines from the generated file into user.inc and make the settings as you like. The lines with #local can also be seen in user.inc. Therefore you have to replace #local with #declare. Afterwards, the options in the generated file have no further effect. They will be overridden by those in the user.inc

7. Installation

  • Windows

There is an installer for Windows. Simply start the EXE you downloaded and install it anywhere you like. After installation start 3d40.ulp (Eagle 4.0x) or 3d41.ulp (Eagle 4.1x) from <installdir>/ulp by selecting

  File->Run

in the board editor. When you then want to render the image you have to save the produced POV-files in <installdir>/povray. Otherwise you can tell POVRay where to search for the INC-files. How you can do that is described in chapter 9.1

  • Linux

You have to unpack the ZIP-file in any folder you like. After that the procedure is the same as for the windows version. Simply start the right ULP for your Eagle version and create the POVRay file.

* Download Location

You can download the Eagle3D binary from here

8. Settings in the POVRay File

You can define some settings in the POVRay file which will be generated by the 3d.ulp. These items will be discussed here.

  • #declare use_file_as_inc = off;

Set this value “on” to use the file as an include file in another POVRay file. For example in order to generate a board from several modules. The board will be defined as a macro with 6 parameters. The name of the macro can be taken from

the POVRay file after the ‘spot’ lines.

  • #declare global_res_shape = 1;

“0” or “1” changes the resistor’s form.

  • #declare global_res_colselect = 0;

Set this value set “0” and the resistor’s colors will be defined by the following lines. Set it to “1” for the color to be set randomly.

  • #declare global_res_col = 1;

Influences the color of discrete resistors. The color-number table can be seen in the POVRay file.

  • #declare pcb_upsidedown = off;

Set to “on” displays the bottom side of the board.

  • #declare pcb_rotdir = x;

Sets the axis which the board is rotated.

  • #declare environment = on;

Switch on/off the rendered background ‘waves and clouds’.

  • #declare pin_length = 2.5;

Set the pin length of discrete parts.

  • #declare col_preset = 2;

Various color presets for board, pads, silk screen and so on can be set here.

  • #declare pin_short = on;

Set “on” the pins of discrete parts will be shortened to the above given measure.

  • #local cam_x = 0;
    #local cam_y = 64;
    #local cam_z = -16;
    #local cam_a = 45;
    #local cam_look_x = 0;
    #local cam_look_y = 0;
    #local cam_look_z = 0;

Easy definition of camera settings.

  • #local pcb_rotate_x = 0;
    #local pcb_rotate_y = 0;
    #local pcb_rotate_z = 0;

Rotate the board according to the given values.

  • #local pcb_parts = on;
    #local pcb_polygons = on;
    #local pcb_silkscreen = on;
    #local pcb_wires = on;

Particular parts of the board can be switched off here.

  • #local lgtx_pos_x = 12;
    #local lgtx_pos_y = 19;
    #local lgtx_pos_z = 8;
    #local lgtx_intense = 0.400000;

Define the setting of the 4 light sources here.

  • #declare pcb_layer1_used = 1;
    #declare pcb_layer16_used = 1;
    #declare pcb_height = 1.500000;
    #declare pcb_cuhight = 0.035000;
    #declare inc_testmode = off;

Don’t change these values.

9. Remarks Concerning POVRay

9.1 INI file

The generated POVRay file does not contain the whole path leading to the INC files, but only the filename. The INC files have to be either in the same directory as the POVRay file is, or one has to return the search path to POVRay. This can be done by creating an INI file. Such an INI file has the following format (Windows path):

;path to Windows font directory 
Library_Path=C:\WINDOWS\Fonts
;path to INC files
Library_Path=C:\eagle3D\inc

;this is the target for generated images
;if this section is commented out, it will be written 
;into the POVRay file directory
Output_File_Name=c:\temp\povout\
;Format of the image file
Output_File_Type=S
;Type N for PNG
;Type S for standard system format (Windows BMP, Mac Pict ...)
;Type C for compressed Targa (RLE)
;TypeT for uncompressed Targa 
;Type P for Unix PPM

;Settings for animations
Initial_Frame = 1
Final_Frame = 1
Initial_Clock = 0.0
Final_Clock = 1.0

The main INI file can also be edited in POV-Ray by going to “Tools | Edit master POVRAY.INI”.

9.2 Font

For part lettering Courier Bold (courbd.ttf) will be used. If you would like to use another font, for example because it is not available on your system, you may change the font name

#declare besch_font = “courbd.ttf”

in tools.inc.

9.3 Coordinate system

This is the coordinate system used in POVRay. The rounded arrows show the respective rotation around the axis in positive direction (left hand system).

9.4 Creating your own parts

A tutorial to create your own parts has been made and can be found here

I can’t create complete instructions to build your own parts. The Goal goal of this chapter is to write a style guide showing you how to create macros that they can easily be integrated into Eagle3D. You should carefully consider the following points:

  • One part should only be defined by one macro. If you want to use more than one macro assemble them all into one big macro.
  • Names of macros are always written in capitals.
  • For parts which are looking similar to each other a basic macro should be created. Example for such a basic macro is IC_SMD_GRND(...) which can not only create packages like SOP, SSOP, TSSOP but also SOT23 or a DPAK.
  • Macros should always start with a prefix which shows to which ‘.inc’ file they belong. For example a macro which has to be in part of ic.inc should start with IC_ and so on. This is not true for all macros at the moment but should be done for future macros.
  • All Macros should become an clear name. AXBBK() is not very informative.
  • Macros should get English names.
  • The corresponding assignment lines for 3dpack.dat should be given for each macro call.
  • One POVRay unit is one millimeter.

I will also take macros which don’t accomplish all the points above but it would be a lot easier for me to integrate macros into Eagle3D if they fulfill the points above.

10. Thanks and Contacts

My thanks to several individuals for their collaboration and help provided in Eagle3D development. Please contact me if I have inadvertently missed anyone.

These are, in project chronological order:
Andreas Fecht <info(replace with at)vetter-und-fecht.de>
Robert Eckelmann <dc6xs(replace with at)dc6xs.de>
Axel Rühl <axel.ruehl(replace with at)gmx.de>
Tino Böhme <boehme.t(replace with at)web.de>
Andreas Rebmann <A.Rebmann-Elektrotechnik(replace with at)t-online.de>
Klaus Schmidinger <kls(replace with at)cadsoft.de>
Ing. J.M. Rafetseder <aon.912412027(replace with at)aon.at>
Uwe Bonnes <bon(replace with at)elektron.ikp.physik.tu-darmstadt.de>
Tobias Müller <Tobias_Mueller(replace with at)twam.info>
Tobyas Hennig <Tobyas.Hennig(replace with at)t-online.de>
Ulrich Trettner <ulrich(replace with at)trettner.de>
Rudi Hofer <rudi.hofer(replace with at)t-online.de>
Falk Stricker <Falk.Stricker(replace with at)gmx.de>
Frank Albert <ich(replace with at)ossiostborn.de>
Uwe Lorenz <u.lorenz(replace with at)er-dresden.net>
A. Zihlmann <berti(replace with at)wueschomania.org>
Walter Mücke <hochberg3(replace with at)01019freenet.de>
Joseph Zeglinski <JAZeglinski(replace with at)rogers.com>
Nigel Eke <me(replace with at)nigel-eke.com>
Duane Clark <dclark(replace with at)akamail.com>
Tilmann Reh <tilmann.reh(replace with at)autometer.de>
Richard Hammerl <hotline(replace with at)cadsoft.de>
MOSES <iloff(replace with at)mosesele.de>
Christian Hostelet <c.hostelet(replace with at)wanadoo.fr>
Henry Nestler <henry.nestler(replace with at)nexgo.de>
Friedrich Bleikamp <fbleikamp(replace with at)web.de>
Jan Bartels <j.bartels(replace with at)arcor.de>
Willi Ring <willi.ring(replace with at)web.de>
Oliver Saal <osaal(replace with at)gmx.de>
Juraj Rojko <juraj(replace with at)rojko.cz>
Daniel Cardona <dancardona50(replace with at)hotmail.com>
Frantiek Burian <BuFran(replace with at)seznam.cz>
Michael <info(replace with at)elk-tronic.de>
Carsten Kögler <koegler(replace with at)ftz-leipzig.de>
hebel23 <hebel(replace with at)hebel23.de>
Björn Schrader <b.schrader(replace with at)gmx.de>
Bernd Karle <info(replace with at)bksoft.de>
Philippe Boucheny <philippe.boucheny(replace with at)free.fr>
Juan Romero Alvarado jromalv@hotmail.com

Contact:
Matthias Weißer
Albert-Schweitzer-Str. 29
D-78087 Mönchweiler
matthias@matwei.de
http://www.matwei.de

If you send me an email please include “[Eagle3D]” in the Subject line of the email. If you didn’t do this it is quite likely that the mail will be caught by my mailfilter. New parts, proposals and requests concerning the ULP and 3D libraries are always welcome. But I beg you to use the common compression mechanism to send files (jpg for images, png or gif for schematics and all this wrapped with zip). Downloading images in 1024×768 bmp format with ISDN is no fun at all. If sending such a huge amount of data (>2MB) is really unavoidable , please contact me first.

If there are any errors, please also send the corresponding BRD file or the file which causes the error. This helps me check it out.

Thank you for your understanding.

Appendix A: Change Log

0.90 (26.06.2002)

  • First public release

0.91 (30.06.2002)

  • A union{} will be generated over all objects
  • new parts
    • SO8
    • SO14
    • SO16
    • SO16W
    • SO20W
    • SO24W
    • SO28W
    • DIODE-MELF
    • DIODE-MINIMELF
    • LED5mm
    • TO18
  • Request of color and transparency of a LED

0.92 (02.07.2002)

  • Enormous speedup (>factor 10), if holes are not generated i.e. the option fast holes is selected. A difference{} was generated, which contained a single object that made no sense, but needed a lot of rendering time.

0.93 (11.07.2002)

  • New parts
    • Connectors from con-lsta.lib (only vertical)
    • LED 3 mm
    • Crystal with 5 mm Pitch (height will be requested)
    • New SMD capacitors (smarter ones)
    • 0,25 W discrete resistor vertical
    • 0805LED
    • SOT23
    • SOD80
    • SOD87
    • PLCC20, 28, 32, 44, 68, 84
    • SO32-400 mil
    • UMAX8, 10
    • Parts without package (e.g. SMD jumper from jumper.lib)
    • Clock crystal (TC26) vert. 2,5mm pitch
    • All capacitors from capacitor-wima.lib
    • SMD capacitors (round, from rcl.lib)
    • SIL-resistors network (from resistor-net.lib and resistor-sil.lib)
  • Unknown parts which can be assigned manually
  • Adjustment of default colors for boards and tracks
  • Non-rectangular boards will be drawn correctly (with restrictions)
  • Holes which don’t belong to parts/vias will be generated now
  • Silk screen (experimental)
  • Support of multilayer boards (2,4,6,8,10,12,14,16 layers)
  • Output for texts in layers 1-16
  • Automatical generation of lettering for SMD resistors from the part’s value
  • Screen dialog texts are taken from a language file now
  • Basic macro for QFP package. Any QFP package with an even number of pins per side can be generated now.

0.94 (18.07.2002)

  • New parts
    • PLCC sockets (20,28,32,44,52,68,84)
    • PLCC52
    • TSOP32
    • B3F_10XX1 from switch-omron.lbr
    • DIP6
    • DIP socket basic macro + diverse variants
    • TSSOP (8,14,16,20,24,28,38,48,56,64)
    • QSOP (16,20,24,28)
    • SSOP (14,16,20,24,28,48,56)
    • TSOPII (28,32,44,50,54,86)
    • LQFP64 0,5 mm
    • TQFP32 0,8 mm
    • TQFP44 0,8 mm
    • TQFP64 0,8 mm
    • TQFP100 0,5 mm
    • TQFP144 0,5 mm
    • PQFP44 0,8 mm
    • PQFP100 0,65 mm
    • PQFP160 0,65 mm
    • PQFP208 0,5 mm
    • TSOP28x13 mm
    • TSOP32x13 mm
    • TSOP32x20 mm
    • TSOP48x20 mm
    • TSOP56x20 mm
  • Board can be rotated in any angle
  • QFP macro also for odd number of pins
  • Automatical correction of text size for QFP macro
  • New macro SOICs. This macro should be able to generate all SMD-ICs with pins on two sides and should be useable for SMD transistors, too.
  • It’s possible now to choose a socket for DIP packages
  • Silk screen does not exeed the rectangular board borders anymore
  • Output of text in the place plan layers
  • It is possible to use any number of layers for multilayer boards. For boards that use the classification from 0.93 the height information will be generated automatically.
  • For using another classification one can adjust the start dialog

0.95 (28.07.2002)

  • new parts
    • Trimmer S64Y from Spectrol
    • crystal osci DIP14
    • diverse discrete resistors (0,35 W;0,5 W;1 W;1,3 W)
  • Place plan generation now works not only with wires but also with circles and arcs. Arcs, however, will be drawn by lots of small boxes which decreases rendering speed about a maximum of 10–20%.
  • Place plan was visible on SMD pads. It’s corrected now.
  • The manual assignment of parts will be saved for each board in a separate projekt.mpd in the project directory.

0.96 (15.09.2002)

  • If only bottom layer was used it was displayed on the top side.
  • For assignments of packages and 3D models you can define an axillary file 3dusrpac.dat.
  • Holes which are defined in the Hole layer, are shown in real mode now.
  • You can select English or German language now. Thanks to Falk Stricker.
  • For real holes one can define a diameter limit from where on they will be displayed as real openings. Thus bigger ones can be rendered as real openings, while smaller ones don’t cost lots of performance.

0.97 (02.01.2003)

  • New parts
    • SQFP-R-14×20-100
    • AK700 3-pin screw terminal block
    • AK700 3-pin screw terminal block without middle pin
    • 5V Relay
    • Some jumpers from jumper.lbr
    • SMD trimmer 3202
    • discrete resistors, package 0204
    • Trimmers from Spectrol
    • SMD crystal
  • The story with adjustable hole diameters is revised. Should work properly now.
  • Meanwhile the unions have been grown enormously. Cleaned up.
  • Corrected lettering of screw terminal block.
  • Generation of bands for resistors only worked with ‘.’ and not with ‘,’. Corrected.
  • New calculation of camera settings. Presettings should fit better now.
  • Slight changes in QFP macro (additional parameter) → see qfp.inc
  • Some parameters can be set in the .pov file directly i.e. in a user.inc file.
  • Output of texts in layers 21 to 28 also possible, if place plan is active.

0.98 (10.03.2003)

  • New parts
    • Crystal osci DIP8
    • DIP switch (1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 12)
    • DIP rotary switch (10 and 16 positions)
    • DSUB female connectors (9, 15, 25, 37)
    • DSUB male connectors (9, 15, 25, 37)
    • SMD-MELF resistors
    • SMD tantal capacitors
  • Total revision of the color system. Now different presets are available.
  • Output of date was buggy.
  • When using a 3dusrpac.dat for manual assignment, it could cause an error if one did not select a model.
  • Corrected error in 3dpack.dat (L_5mm_S).
  • Some improvements in the start dialog.
  • DIP macros revised completely.
  • Support of square pads and vias.
  • Socket option for all DIPs
  • WIREs and RECTs (in board and package) will be generated now.
  • Corrected some bugs in 3dpack.dat.
  • Pin length can be adjusted for discrete parts now
  • Multilayer distances will be calculated correctly now. Nomore manual adjustment possible. The corresponding dialog has been erased from the start menu.
  • New dialog for assignment of unknown parts (including search function)
  • Wires no longer cover real holes. It can cause problems, however, if a wire without bend connects two vias, or the wire is relatively wide in comparison to the via’s diameter.
  • Renamed col.inc to tools.inc
  • Output path can lead to BRD path now
  • A POV file can be used as a module in order to generate a whole system consisting of several boards.
  • Removed some bugs from the generation of resistor bands.

0.99 (16.04.2003)

  • Eagle3D now runs under Eagle 4.1
  • Cleaned up Sourcecode
  • Exclude-Lists are possible
  • You can freely name the layers which are used for the silk screen.
  • A list of unknown parts is printed at the end of the POVRay-File.
  • The Prefix of SMD-Parts (1210 – 0402) is used. So the prefix of the name of such a package (R,C) decides which model is used. So it is possible to use the same 0805 package for resistors and capacitors.
  • Removed resistor2.inc. New structure of resistor.inc and some new, very powerful macros.

1.00 (18.06.2003)

  • New parts
    • Pinhead with shunt (1-10)
    • Bent shrouded headers (6, 10, 14, 16, 20, 26, 34, 40, 50, 64)
    • Bent pinheads (2-30)
    • DO214 (AA, AB, AC)
    • 90° bent pinheads
    • Powerconnector from con-conrad.lbr
    • LED-Rows (1, 2, 3, 4, 5)
    • Solder pads (1,3mm 1,1mm 1,0mm)
    • MSOP10
  • Pinheader (from jumper.lbr) can be displayed with or without shunts.
  • If a text of a part was smashed it wasn’t displayed.
  • Changed the way the ULP Path is handled. It is now possible to use another directory for the ULP than the standard <eaglepath>/ULP
  • There was some trouble with the correction offset from the 3dpack.dat.
  • Polygons in the silkscreen where not processed.
  • Added Blind and Burried-Vias (for Eagle 4.1)
  • some other changes due to Eagle 4.1
  • 6,8M as a resistor value results in a wrong print on the resistor
  • 25% gray as LED-color is possible (IR-LED)

1.01 (17.10.2003)

  • New Parts
    • DIP4
    • some special DIP packages and the corresponding sockets
    • XTAL in PDIP8 and PDIP14
    • DC-DC-Converter (NME-S, NMA-S and NMA-D)
    • SMD assembly SUBD
    • Phoenix Mini-Combicon 3.81mm
    • SMD assembly tactile switch from Schurter
    • Fuse holder inc. fuse
    • Round wires were alway drawn at top layer
  • Big radians for ARC’s caused wrong display
  • If a part have no comment in 3dpack.dat there was a parse error in POVRay
  • Complete revision of the part library. If you have created a 3dusrpac.dat you have to adjust it with the new macro names.
  • If a name in Eagle contains a ‘&’ a parse error in POVRay happened
  • If the language was changed the name of the colors in the dialog boxes where not updated
  • While you select parts manually a image of the selected part can be shown. (additional download required)
  • Silkscreen was sometimes drawn outside the PCB.
  • With Eagle >=4.10 drills where alway real drills which cause long rendering times in POVRay.
  • If the PCB was rotated and environment was active the PCB got flooded by the water plane.

1.02 (10.03.2004)

  • New parts
    • TO3
    • TO18D
    • TO39
    • TO66
    • PT10 Potentiometer
    • AK350
    • rectangular LED
    • some disc capacitors
    • SOT23-5/6
    • SOT223
  • Pad’s, Via’s and SMD’s are now displayed correct in all shapes.
  • Changed the structure of the POVRay file. The memory usage while raytracing is reduced by about 25%. On PC’s with a small amount of RAM this will lead to a great increase in rendering speed because it has not to swap.
  • Removed all @’s from documentation and library.
  • German special characters (ä, ö, ü and ß) caused problems on some systems. They where interpreted as EOF and Eagle stops reading the 3dpack.dat. Removed all special characters from 3dpack.dat and the library.
  • Implemented support for animations.
  • In Eagle3D for Eagle 4.1 all shapes of PCB should be possible.

1.03 (29.05.2005)

  • New Parts
    • USB connector type A
    • USB connector type B
    • USB connector type mini B
    • Fuse holder inc. fuse
    • era transformators
    • 2mm pinheaders
    • CF socket and CF card
    • PQFP-48
    • 3,5mm stereo connector
    • PC Power connector (the big one)
    • TYCO H38 inductor
  • If ARC’s where used in another layer then layer 20 this caused a parse error.
  • There is solder now.
  • Changed the sequence of parsing. After the PCB the parts are now written to the output file. (internal reasons)
  • Animations can use a different path of flight and path of view.
  • Corrected some problems with rotated objects in Eagle 4.1
  • Fixed a bug regarding to via’s and multi layer PCB’s
  • Manual assignments are stored permanently in the 3dusrpac.dat
  • You can create parts out of Eagle layers (see 4.12)
  • More improvements on generating the shape of the PCB.

1.04 (28.01.2006)

  • New Parts
    • Phone Jaks
    • Big (20cm) LED 7 segment display
    • SOT143
    • Murate Chip Coil
    • Axial electrolyte capacitators
    • SK96 heatsink
    • Molex 53047
    • Molex 53048
    • MICROMELF Diode
    • 1206 & 0603 SMD Chip LED
    • MLF28, MLF32, MLF44, MLF64
    • RJ45
    • MicroMatch Federleisten
    • SIP DC-DC converters
    • TO52
    • TO263
    • Buzzer
    • DIP DC-converters
    • T7 trimmer
    • KL195 heatsink
    • Murate TZ03 cap trimmer
    • 72PT trimmer
    • T18 trimmer
    • EI transformers
    • Rectifier KBU8A
    • TO220 heatsink
    • Celduc SK relay
    • MATNLOK connectors
    • PR & RB power resistors
    • LMI connectors
    • Phoenix 5,08mm MSTB connectors
    • Switches from ITT
    • Faston connectors
    • UI transformers
  • New Languages
    • French (contributed by Basile Compin)
    • Italian (contributed by Luigi Erroi ‘gigillo@email.it’)
    • Portuguese (contributed by José Santos)
  • Some parts have been renamed
  • Fixed a bug in automatic package generation
  • New Fontsystem. More than one font can be used and there is a fallback when the font is not available.
  • New macros for screws, nuts and washers in tools.inc

1.05 (27.11.2006)

  • New parts
    • TQFP112
    • TSOP86
    • Coax B35N61
    • DIN connectors
    • Precision female header
    • HEBO 13
    • Push button 6x6mm
    • Rectifier
    • SOT93
    • TSM4 SMD trimmer
    • SM-LP-5001 from Bourns
    • TCVCXO CFPT-37 CFPT125 and CFPT126 from C-MAC
    • 1K2 switches from SECME
    • SMD bridge DF...S
    • Laser diode or receiver pigtail from PD-LD
    • TS53Y SMD trimmer
    • WE-SL2 from Wurth Electronik
    • SMD ceramic resonator
    • SMD 32768 Hz crystal
    • Low profile female header
    • LQFP 48
    • BNC connector
    • Reed relay
    • Improved SUBD Macro
    • SK104 heat sink
    • Another rectifier
  • Bug with animations together with “Write POVRay file” fixed.
  • Atmel and FTDI logos on SOIC packages
  • If a board outline couldnt be detected a message box with a warning appears.
  • Logo assignment can be disabled.
 
 
en/eagle3d/documentation.txt · Last modified: 2008/12/27 12:06 by admin
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